The present invention relates to a random signal generator.
In electronics, and especially in the field of chip cards, it is sometimes necessary to have available means to generate a random logic signal, namely a signal comprising a random sequence of bits at 1 or at 0.
For example, in a standard procedure of chip card reader authentication, a chip card sends the reader a random signal, hereinafter called RANDOM, of the type referred to here above, comprising for example 16 or 32 bits. The chip card computes the result R=R.sub.Ks (RANDOM) of the conversion of RANDOM by an authentication function F.sub.Ks using a secret key Ks. The terminal, for its part, performs the same computation and sends a result R' to the card. If the results R and R' are identical, the card considers the terminal to be authentic and agrees to carry out the requested transaction.
In the prior art, certain wired logic random generators take the form of a logic machine (or cell automaton) comprising a finite number of internal states. These may be for example a shift register, some bits of which are sent back to input by means of an XOR gate. On the basis of an initial internal state, the logic machine is activated by means of a clock signal and, at each clock stroke, an internal bit of the logic machine is extracted.
The drawback of these logic machines is that they generally show a high rate of repetitivity of the sequences of bits that they produce, as well as a statistical bias at output relating to the distribution of the "1"s and "0"s. To mitigate this drawback, it is necessary to design logic machines having a very large number of internal states, the theoretical ideal being that the machine should have an infinite number of internal states. However, this approach runs counter to the requirements of simplicity, low cost price and low consumption on the part of the random generators.
Furthermore, there are known random generators using electronic noise as a random signal source. Indeed, electronic noise is by its nature essentially random. Furthermore, electronic noise is present in all electronic circuits because of the thermoelectric agitation, present in electronic components, and the transistor switching noises. It is therefore easy to make an electronic noise source, for example by means of an electronic component or, more simply again, by tapping the electronic noise present inside a circuit.
FIG. 1 gives a schematic view of a standard random generator 1 working by means of an electronic noise source N. The generator 1 comprises an infinite theoretical gain comparator 2 receiving the electronic noise N at its positive input and a reference voltage Vref at its negative input. The output of the comparator 2 delivers a random logic signal RS. The signal RS is applied to a sampler circuit 3 that delivers a random signal RSs synchronized with a clock signal Hs. The circuit 3 is for example an S-C flip-flop circuit activated by the leading edges of the clock signal Hs. The synchronous flip-flop circuit 3 receives the RS signal at its input S (Set) and a reverse signal /RS at its input C (Clear) by means of an inverter gate 4. The signal RSs is taken at the Q output of the flip-flop circuit S-C.
FIG. 2 shows the signals RS, Hs and RSs of the generator 1 and FIG. 3 shows the fluctuations of the noise N in relation to the reference voltage Vref. The signal RS oscillates randomly between the logic value 0 and the logic value 1 (saturation voltage of the amplifier 2) as a function of the amplitude of the noise N in relation to the reference voltage Vref. Since the noise N is essentially random, the signal RS is also random. At each edge 5 of the clock signal Hs, the synchronized signal RSs copies the value of the signal RS and keeps this value up to the next clock edge. The signal RSs is thus a random sequence of bits synchronized with the clock signal Hs, for example the sequence "11010110001" shown in FIG. 2.
Practice shows that the generator 1 of FIG. 1 has various drawbacks, relating firstly to the electrical consumption of the comparator 2 and, secondly, to the difficulty of compensating for the voltage drifts that appear in the amplifier 2 as a function of the temperature. As shown in FIG. 4, these drifts cause the amplifier 2 to shift the noise N with respect to the reference voltage Vref so that the signal RS may be found to be blocked at the value 1 or 0.
The patent application FR 2 390 047 describes a random signal generator in which the amplitude of an electronic noise is compared with a reference voltage to produce a logic signal with a random pulse width. This principle of operation corresponds to the one that has just been described.